MC100EP195B: 3.3 V ECL Programmable Delay Chip

Description: The MC100EP195B is a Programmable Delay Chip (PDC)...
  • The MC100EP195B is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and multiplexers as shown in the logic diagram, Figure 2. The delay increment of the EP195B has a digitally selectable resolution of about 10 ps and a net range of up to 10.2 ns. The required delay is selected by the 10 data select inputs D(9:0) values and controlled by the LEN (pin 10). A LOW level on LEN allows a transparent LOAD mode of real time delay values by D(9:0). A LOW to HIGH transition on LEN will LOCK and HOLD current values present against any subsequent changes in D(10:0). The approximate delay values for varying tap numbers correlating to D0 (LSB) through D9 (MSB) are shown in Table 6 and Figure 3.
  • Features
  • Maximum Input Clock Frequency >1.2 GHz Typical
  • Programmable Range: 0 ns to 10 ns
  • Delay Range: 2.2 ns to 12.2 ns
  • 10 ps Increments
  • PECL Mode Operating Range:VCC = 3.0 V to 3.6 V with VEE = 0 V
  • NECL Mode Operating Range:VCC = 0 V with VEE = 3.0 V to 3.6 V
  • IN/INb Inputs Accept LVPECL, LVNECL, LVDS Levels
  • A Logic High on the EN Pin Will Force Q to Logic Low
  • D10:0 Can Select Either LVPECL, LVCMOS, or LVTTL Input Levels
  • VBB Output Reference Voltage
  • Applications
  • Automated Test Equipment (ATE)
  • Technical Documentation & Design Resources
    Product Change Notification
    Availability and Samples
    MC100EP195BFAG
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V ECL Programmable Delay Chip
  • Package Type: LQFP-32
  • Package Case Outline: 
  • MSL: 2
  • Container Type: JTRAY
  • Container Qty: 250
  • Inventory

  • Market Leadtime (weeks):2 to 4
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  • ON Semiconductor:1,000
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  • MC100EP195BFAR2G
  • Status: Lifetime
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V ECL Programmable Delay Chip
  • Package Type: LQFP-32
  • Package Case Outline: 
  • MSL: 2
  • Container Type: REEL
  • Container Qty: 2000
  • Inventory

  • Market Leadtime (weeks):Contact Factory
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  • MC100EP195BMNG
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V ECL Programmable Delay Chip
  • Package Type: QFN-32
  • Package Case Outline: 488AM
  • MSL: 2
  • Container Type: TUBE
  • Container Qty: 74
  • Inventory

  • Market Leadtime (weeks):2 to 4
  • Arrow:0
  • Avnet:<100
  • Mouser:<100
  • ON Semiconductor:2,590
  • MC100EP195BMNR4G
  • Status: Lifetime
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V ECL Programmable Delay Chip
  • Package Type: QFN-32
  • Package Case Outline: 488AM
  • MSL: 2
  • Container Type: REEL
  • Container Qty: 1000
  • Inventory

  • Market Leadtime (weeks):Contact Factory
  • Arrow:0
  • ON Semiconductor:4,000
  • PandS:<1K
  • Specifications
  • Input Level: CML  ECL  LVDS 
  • Output Level: ECL 
  • VCC Typ (V): 3.3 
  • fMax Typ (MHz): 1200 
  • td(prog) Min (ns): 8.95 
  • td(prog) Max (ns): 12.11 
  • td(step) Typ (ps): 11 
  • tJitter Typ (ps): 2.6  1.1 
  • tR & tF Max (ps): 300 
  • Package Type: LQFP-32  QFN-32 
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