MC100LVEP111: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Description: The MC100LVEP111 is a low skew 2:1:10 differential...
The MC100LVEP111 is a low skew 2:1:10 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP111 is operating under PECL conditions.
The LVEP111 specifically guarantees low output-to-output skew.Optimal design, layout, and processing minimize skew within a device and from device to device.
To ensure tightest skew, both sides of differential outputs identically terminate into 50 ohms even if only one side is being used. When fewer than all ten pairs are used, identically terminate all the output pairs on the same package side whether used or unused. If no outputs on a single side are used, then leave these outputs open (unterminated). This will maintain minimum output skew. Failure to do this will result in a 10-20 ps loss of skew margin (propagation delay) in the output(s) in use.
Features
85 ps Typical Device-to-Device Skew
20 ps Typical Output-to-Output Skew
Jitter Less than 1 ps RMS
Additive RMS Phase Jitter: 60fs @156.25MHz, Typical
Maximum Frequency >3 Ghz Typical
VBB Output
430 ps Typical Propagation Delay
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V
Open Input Default State
LVDS Input Compatible
Applications
General purpose clock and data distribution for Networking, ATE and Computing
Technical Documentation & Design Resources
Product Change Notification
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Final Notification of ASE-SH (Shanghai) Qualification for Assembly of the 32 Lead Low Profile Quad Flat Package (LQFP).
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Initial Notification of ASE-SH Qualification for 32,48 and 100 lead LQFP.
INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION
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3Q2012 Product Discontinuance Notice
PRODUCT DISCONTINUANCE
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Datasheet change of Tpd lower limit @ 85C on MC100LVEP111
PRODUCT BULLETIN
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Final Notification for M35 and M5 products from COM1 wafer fab (Phoenix AZ) to CZ4 wafer fab (Roznov, Czech Republic)
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Initial Notification for MOSAIC M35 and MOSAIC M5 products from COM1 wafer fab (Phoenix AZ) to CZ4 wafer fab (Roznov, Czech Republic)
INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION
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FPCN for Qualification of QFN/DFN (1.6x1.6MM to 8.0x8.0MM) on 0.90mm thickness
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Typographical Error Update for MC100LVEP111, MC10/100ELT20, and the MC10/100H640 Devices.
PRODUCT BULLETIN
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Final PCN for Qualification of AIT, Batam, Indonesia for assembly/test of LQFP32/52 packages
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Pb Free (Lead Free) Part Number 16 Character Nomenclature Set-Up
PRODUCT BULLETIN
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Qualification of AIT, Batam, Indonesia for assembly/test of LQFP32 package
INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Final Notification for IPCN#11335, Wafer Capacity Addition for MOSAIC5 Technology - Group 7
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Lead Free Products Marking Identification
PRODUCT BULLETIN
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Final Notification for IPCN#11335, Wafer Capacity Addition for MOSAIC5
FINAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Update to IPCN# 11335, Wafer Capacity Addition for MOSAIC5 Technology
UPDATE NOTIFICATION
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Initial Notification for Wafer Capacity Addition for MOSAIC5 Technology
INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION
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Dry Packed Parts Labeling Quality Improvement
PRODUCT BULLETIN
Availability and Samples
M100LVEP111FATWG
Status: Active
Compliance: Pb-free Halide free
Description: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Package Type: LQFP-32
Package Case Outline: 
MSL: 2
Container Type: REEL
Container Qty: 2000
MC100LVEP111FAG
Status: Active
Compliance: Pb-free Halide free
Description: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Package Type: LQFP-32
Package Case Outline: 
MSL: 2
Container Type: JTRAY
Container Qty: 250
Inventory
Market Leadtime (weeks):4 to 8
Arrow:0
Avnet:>1K
Digikey:<1K
FutureElectronics:<1K
Mouser:<1K
MC100LVEP111FARG
Status: Active
Compliance: Pb-free Halide free
Description: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Package Type: LQFP-32
Package Case Outline: 
MSL: 2
Container Type: REEL
Container Qty: 2000
Inventory
Market Leadtime (weeks):4 to 8
Arrow:0
Digikey:>1K
MC100LVEP111MNG
Status: Active
Compliance: Pb-free Halide free
Description: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Package Type: QFN-32
Package Case Outline: 488AM
MSL: 1
Container Type: TUBE
Container Qty: 74
Inventory
Market Leadtime (weeks):2 to 4
Arrow:0
Avnet:<100
Digikey:<1K
Mouser:<1K
ON Semiconductor:4,810
MC100LVEP111MNRG
Status: Active
Compliance: Pb-free Halide free
Description: 2.5 V / 3.3 V 2:1:10 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer
Package Type: QFN-32
Package Case Outline: 488AM
MSL: 1
Container Type: REEL
Container Qty: 1000
Packages
Specifications
Type:
Buffer 
Channels:
1 
Input / Output Ratio:
2:1:10 
Input Level:
ECL 
LVDS 
CML 
HSTL 
Output Level:
ECL 
VCC Typ (V):
2.5 
3.3 
tJitterRMS Typ (ps):
0.2 
tskew(o-o) Max (ps):
25 
tpd Typ (ns):
0.43 
tR & tF Max (ps):
255 
fmaxClock Typ (MHz):
3000 
fmaxData Typ (Mbps):
 
Package Type:
LQFP-32 
QFN-32