MC10EP17: Quad Differential Driver/Receiver

Description: The MC10/100EP17 is a 4-bit differential line rece...
  • The MC10/100EP17 is a 4-bit differential line receiver based on the EP16 device. The >3.0 GHz maximum frequency provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators.

    The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

    The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.

    Inputs of unused gates can be left open and will not affect the operation of the rest of the device. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation.

    The 100 Series contains temperature compensation.
  • Features
  • 220ps Typical Propagation Delay
  • Maximum Frequency >3.0 GHz Typical
  • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode Operating Range: VCC= 0 V with VEE= -3.0 V to -5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • Q Output Will Default LOW with Inputs Open or at VEE
  • VBB Output
  • Pb-Free Packages are Available
  • Applications
  • Ideal for buffering high speed oscillators
  • Technical Documentation & Design Resources
    Product Change Notification
    Availability and Samples
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: Quad Differential Driver/Receiver
  • Package Type: TSSOP 20 LEAD
  • Package Case Outline: 9.48
  • MSL: 1
  • Container Type: TUBE
  • Container Qty: 75
  • Inventory

  • Market Leadtime (weeks):2 to 4
  • Arrow:0
  • ON Semiconductor:4,500
  • PandS:<1K
  • Packages
  • Type: Signal Driver 
  • Channels:
  • Input / Output Ratio: 1:1 
  • Input Level: CML  ECL 
  • Output Level: ECL 
  • VCC Typ (V): 3.3 
  • tJitterRMS Typ (ps): 0.147 
  • tskew(o-o) Max (ps):  
  • tpd Typ (ns): 0.22 
  • tR & tF Max (ps): 220 
  • fmaxClock Typ (MHz): 3000 
  • fmaxData Typ (Mbps):  
  • Package Type: TSSOP 20 LEAD 
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