MC10EP52: 3.3 V / 5.0 V ECL Differential Clock/Data D Flip-Flop

Description: The MC10EP/100EP52 is a differential data, differe...
  • The MC10EP/100EP52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the EL52 device. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EP52 allow the device to also be used as a negative edge triggered device. The EP52 employs input clamping circuitry so that under open input conditions (pulled down to VEE ) the outputs of the device will remain stable.
  • Features
  • 330ps Typical Propagation Delay
  • Maximum Frequency > 4 GHz Typical
  • PECL Mode: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode: VCC = 0 V with VEE = -3.0 V to -5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • Q Output will default LOW with inputs open or at VEE
  • Pb-Free Packages are Available
  • Applications
  • Negative edge-triggering
  • Technical Documentation & Design Resources
    Product Change Notification
    Availability and Samples
    MC10EP52DG
  • Status: Lifetime
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V / 5.0 V ECL Differential Clock/Data D Flip-Flop
  • Package Type: SOIC-8
  • Package Case Outline: 751-07
  • MSL: 1
  • Container Type: TUBE
  • Container Qty: 98
  • Inventory

  • Market Leadtime (weeks):Contact Factory
  • Arrow:0
  • Mouser:<1K
  • MC10EP52DTG
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V / 5.0 V ECL Differential Clock/Data D Flip-Flop
  • Package Type: TSSOP-8
  • Package Case Outline: 948R-02
  • MSL: 3
  • Container Type: TUBE
  • Container Qty: 100
  • Inventory

  • Market Leadtime (weeks):17 to 20
  • Arrow:0
  • Avnet:<100
  • Digikey:<100
  • MC10EP52DTR2G
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: 3.3 V / 5.0 V ECL Differential Clock/Data D Flip-Flop
  • Package Type: TSSOP-8
  • Package Case Outline: 948R-02
  • MSL: 3
  • Container Type: REEL
  • Container Qty: 2500
  • Packages
    Specifications
  • Type: D-Type 
  • Bits:
  • Input Level: ECL  CML 
  • Output Level: ECL 
  • VCC Typ (V): 3.3 
  • tJitter Typ (ps):
  • tpd Typ (ns): 0.33 
  • tsu Min (ns): 0.05 
  • th Min (ns):
  • trec Typ (ns):  
  • tR & tF Max (ps): 170 
  • fToggle Typ (MHz): 4000 
  • Package Type: TSSOP-8 
  • ON Semiconductor Full Web Site