NB6L295M: Dual Channel Programmable Delay Line with CML Output

Description: The NB6L295M is a Dual Channel Programmable Delay ...
  • The NB6L295M is a Dual Channel Programmable Delay Chip designed primarily for Clock or Data deskewing and timing adjustment. The NB6L295M is versatile in that two individual variable delay channels, PD0 and PD1, can be configured in one of two operating modes, a Dual Delay or an Extended Delay. In the Dual Delay Mode, each channel has a programmable delay section which is designed using a matrix of gates and a chain of multiplexers. There is a fixed minimum delay of 3.2 ns per channel. The Extended Delay Mode amounts to the additive delay of PD0 plus PD1 and is accomplished with the Serial Data Interface MSEL bit set High. This will internally cascade the output of PD0 into the input of PD1. Therefore, the Extended Delay path starts at the IN0/IN0 inputs, flows through PD0, cascades to the PD1 and outputs through Q1/Q1. There is a fixed minimum delay of 6.0 ns for the Extended Delay Mode. The required delay is accomplished by programming each delay channel via a 3-pin Serial Data Interface, described in the application section. The digitally selectable delay has an increment resolution of typically 11 ps with a net programmable delay range of either 0 ns to 6 ns per channel in Dual Delay Mode; or from 0 ns to 11.2 ns for the Extended Delay Mode. The Multi-Level Inputs can be driven directly by differential LVPECL, LVDS or CML logic levels; or by single ended LVPECL, LVCMOS or LVTTL. A single enable pin is available to control both inputs. The SDI input pins are controlled by LVCMOS or LVTTL level signals. The NB6L295M 16 mA CML output contains temperature compensation circuitry. This device is offered in a 4 mm x 4 mm 24-pin QFN Pb-free package. The NB6L295M is a member of the ECLinPS MAX family of high performance products.
  • Features
  • Linearity +/- 20ps Maximum
  • Maximum Input Clock Frequency >1.5 GHz Typical
  • Programmable Range: 0 ns to 6 ns Dual Mode; Programmable Range: 0 ns to 11 ns Entended Mode;
  • Delay Range: 3.2 ns to 9.0 ns Dual Mode; Delay Range: 6.2 ns to 17.8 ns Extended Mode
  • 11 ps Delay Increments
  • INx/INxb Inputs Accept LVPECL, LVDS Levels
  • 3-Wire Serial Data Interface (SDI)
  • Applications
  • Automated Test Equipment (ATE)Adjustable signal path delays
  • Technical Documentation & Design Resources
    Evaluation/Development Tool Information
    Product Change Notification
    Availability and Samples
    NB6L295MMNG
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: Dual Channel Programmable Delay Line with CML Output
  • Package Type: QFN-24
  • Package Case Outline: 485L-01
  • MSL: 1
  • Container Type: TUBE
  • Container Qty: 92
  • Inventory

  • Market Leadtime (weeks):4 to 8
  • Arrow:0
  • Avnet:<100
  • Digikey:<100
  • Mouser:<1K
  • Newark:<100
  • NB6L295MMNTXG
  • Status: Active
  • Compliance: Pb-free Halide free 
  • Description: Dual Channel Programmable Delay Line with CML Output
  • Package Type: QFN-24
  • Package Case Outline: 485L-01
  • MSL: 1
  • Container Type: REEL
  • Container Qty: 3000
  • Inventory

  • Market Leadtime (weeks):8 to 12
  • Arrow:0
  • PandS:>1K
  • Specifications
  • Input Level: ECL  CML  CMOS  LVDS 
  • Output Level: CML 
  • VCC Typ (V): 2.5  3.3 
  • fMax Typ (MHz): 1500 
  • td(prog) Min (ns):
  • td(prog) Max (ns): 6.9 
  • td(step) Typ (ps): 8.4 
  • tJitter Typ (ps):
  • tR & tF Max (ps): 150 
  • Package Type: QFN-24 
  • ON Semiconductor Full Web Site