NB7L32MMNGEVB: 2.5V / 3.3V 12 GHz Divide by 2 with CML Output Evaluation Board

Evaluation/Development Tool Description

This evaluation board is designed to facilitate a quick evaluation of the NB7L32M GigaComm™ Clock Driver. The NB7L32M is designed to support the distribution of clock/data signals at high operating frequencies and produces two equal differential clock/data outputs from a single input clock/data. The Current Mode Logic (CML) output ensures minimal noise and fast switching edges.

The board is implemented in two layers and provides a high bandwidth 50 Ω controlled impedance environment for higher performance.

  • Maximum Input Clock Frequency 14 GHz Typical
  • 200 ps Max Propagation Delay
  • 30 ps Typical Rise and Fall Times
  • < 0.5 ps Maximum (RMS) Random Clock Jitter
  • Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output), Differential Output Only
  • 50 Ω Internal Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG Devices
  • Technical Documents

    ON Semiconductor Full Web Site