MC100EL51: ECL Differential Clock/Data D Flip-Flop
Description: The MC10EL/100EL51 is a differential clock D flip-...
The MC10EL/100EL51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151 the EL51 is ideally suited for those applications which require the ultimate in AC performance.
The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EL51 allow the device to be used as a negative edge triggered flip-flop.
The differential input employs clamp circuitry to maintain stability under open input (pulled down to VEE) conditions.
The 100 Series contains temperature compensation.
475ps Propagation Delay
2.8GHz Toggle Frequency
ESD Protection: > 1 KV HBM, > 100 V MM
PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V
NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V
Internal Input Pulldown Resistors on D, R, and CLK
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
Transistor Count = 73 devices
Pb-Free Packages are Available
Technical Documentation & Design Resources
Product Change Notification
Availability and Samples
Compliance: Pb-free Halide free
Description: ECL Differential Clock/Data D Flip-Flop
Package Type: SOIC-8
Package Case Outline: 751-07
Container Type: TUBE
Container Qty: 98
Market Leadtime (weeks):2 to 4
VCC Typ (V):
tJitter Typ (ps):
tpd Typ (ns):
tsu Min (ns):
th Min (ns):
trec Typ (ns):
tR & tF Max (ps):
fToggle Typ (MHz):